Address comparison can be used for various purposes including but not limited to memory protection, virtual to physical memory address translation, and the like. Typically, a large memory space can include multiple memory segments that are deemed to be relevant as well as irrelevant memory segments. Various limitations (such as boundary restrictions, size restrictions, and alignment restrictions) can be imposed on the location of the memory segments
An address comparison process can include determining, in parallel, whether an input address is included in either one of a group of relevant memory segments. This parallelism can require multiple comparison modules that speed up the address comparison process but consume expensive semiconductor area and power.
The complexity of the address comparison process and especially the resources allocated for this process is inversely proportional to the restrictions that are imposed on the locations of the memory segments. In order to relax the limitations imposed on the locations of the memory segments there is a need to use a full comparator per each bit (or almost each bit) of the input address. A full comparator is able to determine whether compared elements are equal to each other and if not which compared element is bigger than the other. A full comparator is also referred as a “<,> comparator” or “smaller than, equal to or greater than” comparator. A full comparator is expensive and consumes semiconductor area and power.